1. Field of the Invention
The present invention relates to a pattern inspection apparatus that inspects a pattern formed on a wafer by using an image of a semiconductor device and design data of the semiconductor device. The present invention also relates to a semiconductor inspection system composed of an electron microscope and a computer that operates as the pattern inspection apparatus.
2. Description of the Related Art
In semiconductor devices in recent years, miniaturization and multilayering have been advanced and the logic has become complicated, causing extreme difficulties in the manufacture thereof. As a result, defects attributable to the manufacture process tend to occur frequently, and it is accordingly important to detect the defects efficiently and correctly and to specify a problem of the manufacture process.
The defects attributable to the manufacture process include deformation, cutting, short-circuit of the pattern and the like, and these defects can be detected by comparing a manufactured pattern with a reference pattern having an ideal shape. More specifically, an operator selects a pattern having an ideal shape from patterns formed on a wafer, and the selected pattern is captured and imaged to form a reference image in advance. Then, a pattern to be inspected is captured, and the positions of the image of the pattern to be inspected and that of the reference image are adjusted to each other. Thereafter, finite difference calculation of these two patterns is performed. When a defect is included in the pattern to be inspected, brightness information of a detective position is different from that of the reference image, so that a difference value between these two patterns increases. By use of this property, a position having a difference value equal to or more than a fixed value is detected as a defective position.
However, in the aforementioned conventional inspection method, a registration operation for a reference pattern must be performed by the operator, thus causing a problem where much time is required to inspect patterns of various shapes. For this reason, it has been attempted to automate the registration operation of a reference pattern and thereby to reduce inspection time, by using design data such as CAD (Computer Aided Design) of the semiconductor device as the reference pattern.
Japanese Patent Application Laid-Open Publication No. 2005-277395 (JP-A No. 2005-277395) discloses a method for detecting cutting or short-circuit in a pattern in the following way. Precisely, firstly, an area where the cutting or short-circuit in the pattern is likely to occur is specified from design data. Then, an image area corresponding to the aforementioned area is decided using a result from the positioning of both the design data and a captured image of a circuit pattern. After that, the presence or absence of an edge and its state in the circuit pattern existing in the image area are inspected to detect the cutting or short-circuit of the pattern.